A 30GHz integrated time-division multiplexing front-end for phased-array applications in SiGe.

W. Deng, R. Mahmoudi, A.H.M. Roermund, van, F. Fortes, E. Heijden, van der

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Samenvatting

This paper presents a fully integrated receiver front-end for time-division multiplexing phased-array system. The 30 GHz front-end includes a low-noise amplifier (LNA), a 4:1 multiplexer, a mixer, and a clock sequencer. The circuit has been implemented in a 0.25 ¿m, 130 GHz-fT SiGe process. The front-end shows a input reflection coefficient (S11) of -20 dB, a minimum measured LNA-Multiplexer noise figure (NF) of 4.1 dB, and a maximum conversion gain (CG) of 18.9 dB at 30 GHz. Measurements show a 1dB input compression point of -32.3 dBm, a third order intercept point (IIP3) of -22 dBm, and a channel isolation of 23 dB at 30 GHz. This system reduces receiver power consumption by reducing ADC numbers.
Originele taal-2Engels
TitelProceeding of 2009 IEEE Asian Solid-State Circuits Conference, 16-18 November 2009, Taipei, Taiwan
Plaats van productiePiscataway
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's265-268
ISBN van geprinte versie978-1-4244-4433-5
DOI's
StatusGepubliceerd - 2009

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    Deng, W., Mahmoudi, R., Roermund, van, A. H. M., Fortes, F., & Heijden, van der, E. (2009). A 30GHz integrated time-division multiplexing front-end for phased-array applications in SiGe. In Proceeding of 2009 IEEE Asian Solid-State Circuits Conference, 16-18 November 2009, Taipei, Taiwan (blz. 265-268). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ASSCC.2009.5357260