Samenvatting
Low-power sensor applications e.g. for environmental monitoring, bio-potential recording, and wireless autonomous sensor networks require highly power-efficient ADCs, typically with resolutions of at least 10b. SAR ADCs are generally beneficial in terms of power efficiency. However, the most power-efficient designs currently lack the required accuracy for these applications [1, 2], as they are limited to 9b ENOB. Other designs that have sufficient accuracy (10b) are limited to power efficiencies above 10fJ/conv-step [3]. The aim of this work is to increase the accuracy of highly efficient SAR ADCs beyond 10b, while further improving the efficiency to 2.2fJ/conv-step. To do so, this work introduces a Data-Driven Noise-Reduction method to efficiently suppress comparator noise, applies a segmented capacitive DAC with 250aF unit elements for better efficiency and accuracy, and implements a self-oscillating comparator to locally generate the internally required oversampled clock.
Originele taal-2 | Engels |
---|---|
Titel | Proceedings of the 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 17-21 February 2013, San Francisco, California |
Plaats van productie | Piscataway |
Uitgeverij | Institute of Electrical and Electronics Engineers |
Pagina's | 270-271 |
ISBN van geprinte versie | 978-1-4673-4515-6 |
DOI's | |
Status | Gepubliceerd - 2013 |
Evenement | 60th IEEE International Solid-State Circuits Conference, ISSCC 2013 - San Francisco, Verenigde Staten van Amerika Duur: 17 feb. 2013 → 21 feb. 2013 Congresnummer: 60 |
Congres
Congres | 60th IEEE International Solid-State Circuits Conference, ISSCC 2013 |
---|---|
Verkorte titel | ISSCC 2013 |
Land/Regio | Verenigde Staten van Amerika |
Stad | San Francisco |
Periode | 17/02/13 → 21/02/13 |
Ander | ISSCC |