TY - JOUR
T1 - A 14-Bit Oversampled SAR ADC With Mismatch Error Shaping and Analog Range Compensation
AU - Shen, Yuting
AU - Li, Hanyue
AU - Bindra, Harijot Singh
AU - Cantatore, Eugenio
AU - Harpe, Pieter
N1 - Funding Information:
This work was supported by the Dutch Research Council (NWO) under Grant 16594.
PY - 2023/5/1
Y1 - 2023/5/1
N2 - DAC mismatch is a major challenge for high-resolution ADCs. This brief proposes an analog-detection-based input range compensation technique for high-resolution ADCs with mismatch error shaping (MES). By applying a pre-comparison and suitably switching the DAC MSB, the input loss caused by MES is compensated. By adopting a flying-capacitor sampling technique, the prediction errors found in prior solutions are avoided. The prototype 14-bit SAR ADC achieves 80.4 dB SNDR and 93 dB SFDR in a 4 kHz signal bandwidth with an OSR of 16. It only occupies 0.0034 mm2 and consumes 0.656μW under a 0.8 V supply, leading to a Schreier figure-of-merit of 178.3 dB. These features make it suitable for miniaturized high-performance IoT and biomedical systems.
AB - DAC mismatch is a major challenge for high-resolution ADCs. This brief proposes an analog-detection-based input range compensation technique for high-resolution ADCs with mismatch error shaping (MES). By applying a pre-comparison and suitably switching the DAC MSB, the input loss caused by MES is compensated. By adopting a flying-capacitor sampling technique, the prediction errors found in prior solutions are avoided. The prototype 14-bit SAR ADC achieves 80.4 dB SNDR and 93 dB SFDR in a 4 kHz signal bandwidth with an OSR of 16. It only occupies 0.0034 mm2 and consumes 0.656μW under a 0.8 V supply, leading to a Schreier figure-of-merit of 178.3 dB. These features make it suitable for miniaturized high-performance IoT and biomedical systems.
KW - Analog-to-digital converter (ADC)
KW - flying capacitor sampling
KW - input range compensation
KW - mismatch error shaping (MES)
KW - successive approximation register (SAR)
UR - http://www.scopus.com/inward/record.url?scp=85151510457&partnerID=8YFLogxK
U2 - 10.1109/TCSII.2023.3259821
DO - 10.1109/TCSII.2023.3259821
M3 - Article
AN - SCOPUS:85151510457
SN - 1549-7747
VL - 70
SP - 1719
EP - 1723
JO - IEEE Transactions on Circuits and Systems II: Express Briefs
JF - IEEE Transactions on Circuits and Systems II: Express Briefs
IS - 5
M1 - 10077761
ER -