Doorgaan naar hoofdnavigatie Doorgaan naar zoeken Ga verder naar hoofdinhoud

A 10-bit 10 MS/s SAR ADC with Duty-Cycled Multiple Feedback Filter

Onderzoeksoutput: Hoofdstuk in Boek/Rapport/CongresprocedureConferentiebijdrageAcademicpeer review

309 Downloads (Pure)

Samenvatting

This paper presents a co-design of a 10-bit SAR ADC and its front-end filter. Because the SAR ADC works as a discrete-time data converter, its input signal only needs to be accurate at its sampling moment. Therefore, the filter can be switched off in the ADC conversion phase to save power. To reduce the start-up time when the filter is activated again, a low-power auxiliary amplifier is used in the ADC conversion phase to maintain the filter output roughly. A 10-bit 10 MS/s SAR ADC with such a duty-cycled multiple feedback filter is fabricated in a 65 nm CMOS technology. The filter power has been reduced by 36% thanks to the proposed duty-cycled operation. The prototype achieves 8.3 ENOB and 59.3 dB SFDR at low input frequencies, and it has 40 dB suppression at the Nyquist input frequency, while consuming 91.1 µ W.

Originele taal-2Engels
Titel2023 21st IEEE Interregional NEWCAS Conference (NEWCAS)
UitgeverijInstitute of Electrical and Electronics Engineers
Pagina's1-5
Aantal pagina's5
ISBN van elektronische versie979-8-3503-0024-6
DOI's
StatusGepubliceerd - 7 aug. 2023
Evenement21st IEEE Interregional NEWCAS Conference, NEWCAS 2023 - Edinburgh, Verenigd Koninkrijk
Duur: 26 jun. 202328 jun. 2023

Congres

Congres21st IEEE Interregional NEWCAS Conference, NEWCAS 2023
Land/RegioVerenigd Koninkrijk
StadEdinburgh
Periode26/06/2328/06/23

Financiering

This work with project number 16594 is financed by the Dutch Research Council (NWO).

Financiers
Nederlandse Organisatie voor Wetenschappelijk Onderzoek

    Vingerafdruk

    Duik in de onderzoeksthema's van 'A 10-bit 10 MS/s SAR ADC with Duty-Cycled Multiple Feedback Filter'. Samen vormen ze een unieke vingerafdruk.

    Citeer dit