A 0.1-nW-1-μ W energy-efficient all-dynamic versatile capacitance-to-digital converter

Haoming Xin (Corresponding author), Martin Andraud, Peter Baltus, Eugenio Cantatore, Pieter Harpe

Onderzoeksoutput: Bijdrage aan tijdschriftTijdschriftartikelAcademicpeer review

8 Citaten (Scopus)
6 Downloads (Pure)


A versatile, low-power, and energy-efficient capacitance-to-digital converter (CDC) for Internet-of-Things (IoT) is presented, based on an all-dynamic architecture with adaptable speed, resolution, and range. The proposed CDC includes a single-armed capacitive bridge and a differential switched-capacitor 10-b asynchronous successive approximation register (SAR) analog-to-digital-converter (ADC). The bridge output is directly sampled by the ADC through fully passive correlated-double-sampling (CDS) approach, which enables a fully dynamic operation. The design is fabricated in a 65-nm CMOS technology. Thanks to the dynamic nature of the CDC, sampling rates from 1 S/s up to 100 kS/s are supported and capacitances from 1.23 to 24.59 pF can be digitized, while the power scales inherently from 0.1 nW to 1 μW. Optionally, the range can be further extended to >100 pF, and oversampling can be used to enhance resolution. This makes the design versatile to efficiently deal with a variety of sensors having different speed and resolution requirements and different capacitance values. The 0.1 nW lowest absolute power is > 20 × smaller than the prior art, and the figure of merit (FoM) from 18 to 59 fJ/conv-step is also the lowest among prior designs. To provide application examples, this chip is further verified with a microelectromechanical (MEMS) pressure sensor and a MEMS accelerometer. It can measure environmental pressure consuming only 0.8 nW at a speed of 100 S/s, and measure acceleration using 1.4 nW at a speed of 200 S/s.

Originele taal-2Engels
Pagina's (van-tot)1841-1851
Aantal pagina's11
TijdschriftIEEE Journal of Solid-State Circuits
Nummer van het tijdschrift7
StatusGepubliceerd - 1 jul 2019

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