Projecten per jaar
Organisatieprofiel
Introductie / missie
We research predictable embedded-systems architectures to accelerate verification of real-time performance and safety. To speed up system design we focus on conceptual simplicity and on independent design, verification, and upgrading of applications (composability). We prove our concepts with ASIC, FPGA, middleware, and full-system demonstrators.
Over de organisatie
System design is increasingly complex, as a growing number of applications are integrated in modern systems. Some of these applications have safety and real-time requirements, such as a minimum throughput or a maximum latency, but others do not, resulting in a mixed-criticality system. To reduce cost, system resources are shared between applications, making their timing behavior inter-dependent. Real-time requirements must hence be verified for all possible combinations of concurrently executing applications, which is not feasible with commonly used simulation-based techniques. CompSOC addresses this problem using two complexity-reducing concepts: composability and predictability.
Applications in a composable system are completely isolated (in terms of space, time, and energy) and cannot affect each other’s behaviours, enabling them to be independently designed, debugged, verified, deployed, and updated. Predictable systems, on the other hand, provide lower bounds on performance, allowing applications to be verified using formal performance analysis. This is essential for real-time and safety-critical systems.
CompSOC is an architecture template for predictable and composable systems, and is based on well-defined concepts, in particular:
- the use of budgets to reserve resources thus creating virtual resources
- predictable resources and arbitration to implement budgets
- composable resources and arbitration to remove any interference between applications
- scalability by decoupling resources and their arbitration
For efficiency, the following are additionally desirable: finite schedulng interval, efficient arbitration, efficient resource sharing.
These concepts combine into the concept of a Virtual Execution Platform.
CompSOC concepts have been proven in many demonstrators on FPGA, multi-FPGA, and in ASIC with applications such as multimedia, embedded control, robotics operating system (ROS2). We have performed seminal research on predictable Networks on Chip (Aethereal, Aelite), predictable DRAM controllers (Predator, DRAMPower).
More information can be found here.
Vingerafdruk
Netwerk
Profielen
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Marc C.W. Geilen
- Electrical Engineering, Cyber-Physical Systems Center Eindhoven
- Electrical Engineering, Model-Based Design Lab
- Electrical Engineering, CompSOC Lab- Predictable & Composable Embedded Systems
- Electrical Engineering, Electronic Systems - Universitair Hoofddocent
Persoon: UHD : Universitair Hoofddocent, UD : Universitair Docent
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Kees G.W. Goossens
- Electrical Engineering, Electronic Systems - Hoogleraar
- Electrical Engineering, CompSOC Lab- Predictable & Composable Embedded Systems
- EAISI High Tech Systems - Hoogleraar
Persoon: HGL : Hoogleraar
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Scheduling Adaptive Modular Flexible Manufacturing Systems (SAM-FMS) TTW 17931
Basten, A. A., Geilen, M. C. W., Nasri, M., Marce i Igual, J., de Mol-Regels, M. & Farboud, P.
1/09/20 → 30/09/24
Project: Onderzoek direct
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COMP4DRONES
Goossens, K. G. W., Dehnavi, S., Goswami, D., Sanchez, V., Koedam, M. L. P. J., Nasri, M., van der Hagen, D. & de Mol-Regels, M.
1/10/19 → 31/01/23
Project: Onderzoek direct
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Arrowhead Tools
Voeten, J. P. M., Mohammadkhani, A., Geilen, M. C. W., Basten, A. A., van der Hagen, D. & de Mol-Regels, M.
1/05/19 → 31/07/22
Project: Onderzoek direct
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Efficient Computation of the Max-Plus Semantics of Synchronous Dataflow Graphs
Elahi, H., Geilen, M. & Basten, T., 24 jan. 2023, (E-publicatie vóór gedrukte publicatie) In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. XX, X, 10025363.Onderzoeksoutput: Bijdrage aan tijdschrift › Tijdschriftartikel › Academic › peer review
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Improved Positioning Precision using a Multi-rate Multi-sensor in Industrial Motion Control Systems
Jugade, C., Hartgers, D., Mohamed, S., Goswami, D., Nelson, A. T., van der Veen, G. & Goossens, K. G. W., 2023, (Geaccepteerd/In druk).Onderzoeksoutput: Bijdrage aan congres › Paper › Academic
Open AccessBestand -
Optimization of Cell-Aware Test
Gao, Z., 10 mrt. 2023, Eindhoven: Eindhoven University of Technology. 179 blz.Onderzoeksoutput: Scriptie › Dissertatie 1 (Onderzoek TU/e / Promotie TU/e)
Open AccessBestand
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Microprocessors and Microsystems (Tijdschrift)
Dip Goswami (Lid redactieraad)
2017 → …Activiteit: Types publicaties van collegiale toetsing en redactioneel werk › Redactioneel werk › Wetenschappelijk
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Design Automation for Embedded Systems (Tijdschrift)
Kees G.W. Goossens (Lid redactieraad)
2011 → 2015Activiteit: Types publicaties van collegiale toetsing en redactioneel werk › Redactioneel werk › Wetenschappelijk
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ACM Transactions on Design Automation of Electronic Systems (Tijdschrift)
Kees G.W. Goossens (Lid redactieraad)
2011Activiteit: Types publicaties van collegiale toetsing en redactioneel werk › Redactioneel werk › Wetenschappelijk
Scripties/Masterproeven
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Accuracy Configurable ISP Accelerator for an Image-based Control System
Auteur: Ravattu, A. K., 19 okt. 2021Begeleider: Goswami, D. (Afstudeerdocent 1) & De, S. (Afstudeerdocent 2)
Scriptie/Masterproef: Master
Bestand -
A framework for generating and evaluating error correcting memory controller designs
Auteur: Visser, M. S., 25 feb. 2022Begeleider: Jordans, R. (Afstudeerdocent 1), Koedam, M. L. P. J. (Afstudeerdocent 2), van Berkel, C. H. (Afstudeerdocent 2) & Ravagnani, A. (Afstudeerdocent 2)
Scriptie/Masterproef: Master
Bestand -
An instrumental variables approach to adaptive feedforward controller design
Auteur: Sieswerda, T., 6 jul. 2021Begeleider: Oomen, T. A. E. (Afstudeerdocent 1), Witvoet, G. (Afstudeerdocent 2), Goswami, D. (Afstudeerdocent 2), van der Veen, G. (Externe persoon) (Externe coach) & Mooren, N. (Afstudeerdocent 2)
Scriptie/Masterproef: Master
Bestand