In this thesis, the design of a 60 GHz LNA is described. The design starts from the topology choice, where a structured design approach is adopted. First and second order analysis is done to thoroughly search the topology possibilities, and the choice is made based on the power, noise and gain specifications. The schematic and layout design are done afterwards taking also other specifications such as IIP3 into account. The results of each level of design are given and analyzed. The final simulation results show that the LNA achieves 4.5 dB noise figure, 11 dB available gain, 16 dB voltage gain and 0 dBm IIP3 with 12 mW power consumption.
Structured design of a 60 GHz LNA in 40-nm CMOS technology
Chen, Y. (Author). 31 Oct 2014
Student thesis: Master