This paper proposes a new approach to improve the linearity of a mixing-DAC through a transformer output buffer.The linearity of a current-steering mixing-DAC deteriorates due to a large swing of the output voltage. A new approach to reduce the swing of the output voltage is impedance transformation. This paper presents modelling, analysis and synthesis of a 65nm CMOS on-chip transformer (bandwidth=3.3GHz, from 700MHz to 4GHz) to be used as an output buffer of a mixing-DAC.To analyse this approach, a model of the CMOS transformer is made, including most important extracted parameters of a CMOS transformer. Using an lumped model, the voltage transfer and transimpedance transfer functions are calculated. These are used to verify the useful frequency band of the transformer. The calculations and simulations show that the transformer bandwidth depends on the k factor, Ccoupling and Cwinding,sec. These parameters introduces an unwanted resonance. In this project, a capacitance is introduced to minimize this resonance. By knowing these parameter restrictions, different transformer designs are synthesized to achieve the best linearity result over the whole bandwidth. This resulted in two main strategies: wide-band and narrow-band transformers. Compered to a mixing-DAC with only an output load of 50?, the transformer approach resulted in a linearity improvement of 10dB.
|Date of Award||31 Oct 2013|
|Supervisor||Georgi I. Radulov (Supervisor 1) & E. Bechthum (Supervisor 2)|