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A hybrid processor architecture for (Ir) regular image processing on an FPGA
A.G. Boon
Electrical Engineering
Student thesis
:
Master
Abstract
Date of Award
31 Aug 2008
Original language
English
Supervisor
Henk Corporaal
(Supervisor 1)
Cite this
Standard
A hybrid processor architecture for (Ir) regular image processing on an FPGA
Boon, A. G. (Author).
31 Aug 2008
Student thesis
:
Master