| Date of Award | 31 Aug 1995 |
|---|---|
| Original language | English |
| Supervisor | M.P.J. Stevens (Supervisor 1) |
A converter from IDaSS design files to synthesizable VHDL
Student thesis: Master
Student thesis: Master
| Date of Award | 31 Aug 1995 |
|---|---|
| Original language | English |
| Supervisor | M.P.J. Stevens (Supervisor 1) |