A converter from IDaSS 0.09 to synthesizable VHDL

  • M.N.M.A. Dassen

Student thesis: Master

Date of Award1996
Original languageEnglish
SupervisorM.P.J. Stevens (Supervisor 1) & A.C. Verschueren (Coach)

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  • 782431

    File: application/pdf, 873 KB

    Type: Thesis

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