A 5bit 1GS/s 2.7mW time-interleaved asynchronous digital slope ADC

  • M. Ding

Student thesis: Master

Abstract

Date of Award31 Aug 2011
Original languageEnglish
SupervisorArthur H.M. van Roermund (Supervisor 1), J.A. (Hans) de Hegt (Supervisor 2) & Pieter J.A. Harpe (Supervisor 2)

Cite this

A 5bit 1GS/s 2.7mW time-interleaved asynchronous digital slope ADC
Ding, M. (Author). 31 Aug 2011

Student thesis: Master