A 270 GHz broadband frequency multiplier in 40-nm CMOS

  • X. Zhang

Student thesis: Master

Abstract

A 270 GHz broadband frequency multiplier which effectively generates and combines the even harmonics from multiple transistors is proposed. It takes advantage of standing wave formation to generate high amplitude signals at fundamental frequency and high second harmonic power, and a transmission line ring structure is used to cancel the fundamental frequency by destructive interference of the fundamental frequency signal from several transistors. By using this methodology, a frequency multiplier operating from 234 GHz to 293 GHz is designed in 40-nm CMOS technology. The output power is -9 dBm and conversion loss is 14 dB at 270 GHz.
Date of Award2013
Original languageEnglish
SupervisorMarion K. Matters-Kammerer (Supervisor 1) & Hao Gao (Supervisor 2)

Cite this

A 270 GHz broadband frequency multiplier in 40-nm CMOS
Zhang, X. (Author). 2013

Student thesis: Master