Worst-case latency analysis of SDF-based parametrized dataflow MoCs

M. Skelin, M. Geilen, F. Catthoor, S. Hendseth

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

4 Citations (Scopus)
2 Downloads (Pure)

Abstract

Modern-day streaming digital signal processing (DSP) applications are often accompanied by real-time requirements. In addition, they expose increasing levels of dynamic behavior. Dynamic dataflow models of computation (MoCs) have been introduced to model and analyze such applications. Parametrized
dataflow MoCs are an important subclass of dynamic dataflow MoCs because they integrate dynamic parameters and run-time adaptation of parameters in a structured way. However, these MoCs have been primarily analyzed for functional behavior and correctness while the analysis of their temporal behavior has received little attention. In this work, we present a new analysis approach that allows analysis of worst-case latency for dynamic streaming DSP applications that can be captured using parametrized dataflow MoCs based on synchronous dataflow (SDF). We show that in the presence of parameter inter-dependencies our technique can yield tighter worst-case latency estimates than the existing techniques that operate on SDF structures that abstract the worst-case behaviour of the initial parametrized specifications. We base the approach on the (max,+) algebraic semantics of timed SDF and on its non-parametric generalization known as FSMbased scenario-aware dataflow (FSM-SADF). We evaluate the approach on a realistic case study from the multimedia domain.
Original languageEnglish
Title of host publication2015 Conference on Design and Architectures for Signal and Image Processing (DASIP 2015)
Subtitle of host publicationProceedings of a meeting held 23-25 September 2015, Krakow (Cracow), Poland
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages1-6
Number of pages6
ISBN (Print)9781467377393
DOIs
Publication statusPublished - Jan 2016
EventConference on Design and Architectures (DASIP) 2015 - Cracow, Poland
Duration: 23 Sep 201525 Sep 2015

Conference

ConferenceConference on Design and Architectures (DASIP) 2015
CountryPoland
CityCracow
Period23/09/1525/09/15

Keywords

  • synchronous dataflow (SDF)
  • SDF-based parametrized dataflow (SDF-PDF)
  • (max,+) algebra
  • worst-case latency

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    Skelin, M., Geilen, M., Catthoor, F., & Hendseth, S. (2016). Worst-case latency analysis of SDF-based parametrized dataflow MoCs. In 2015 Conference on Design and Architectures for Signal and Image Processing (DASIP 2015): Proceedings of a meeting held 23-25 September 2015, Krakow (Cracow), Poland (pp. 1-6). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/DASIP.2015.7367259