Abstract
Stability testing of SRAMs has been time consuming. This paper presents a new programmable DFT technique for detection of stability and data retention faults in SRAM cells. The proposed technique offers extended flexibility in setting the weak overwrite test stress, which allows to track process changes without time-consuming post-silicon design iterations. Moreover, it does not introduce extra circuitry in the SRAM array and surpasses the data retention test in test time and detection capability
Original language | English |
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Title of host publication | Test Conference, 2005. Proceedings. ITC 2005. IEEE International, Austin, TX, 8 November 2005 |
Place of Publication | Piscataway |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 33.I-1/10 |
ISBN (Print) | 0-7803-9038-5 |
DOIs | |
Publication status | Published - 2005 |