Abstract
We demonstrate an all-optical circuit that simultaneously performs packet-by-packet clock recovery (CR) and data demodulation from 10-Gb/s nonreturn-to-zero differential-phase-shift-keying packets. It includes a novel power equalizer based on a nonlinear self-polarization switch in a semiconductor optical amplifier that enables operations within 15-dB input power level fluctuations. Data demodulation is realized by a Gaussian narrow filter that simultaneously seeds a stage performing CR. CR is performed by a Fabry-Pérot filter-based circuit. By using the input packets as a gating signal, the circuit is able to extract clock packets with 0-bit rise and fall times. The circuit can operate asynchronously and with arbitrary packet length.
Original language | English |
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Pages (from-to) | 372-374 |
Number of pages | 3 |
Journal | IEEE Photonics Technology Letters |
Volume | 19 |
Issue number | 6 |
DOIs | |
Publication status | Published - 15 Mar 2007 |
Externally published | Yes |
Keywords
- Clock recovery (CR)
- Differential phase-shift keying (DPSK)
- Nonlinear polarization switching (NPS)
- Optical packet switching
- Semiconductor optical amplifiers (SOAs)