Why and How Controlling Power Consumption during Test: A Survey

Alberto Bosio; Luigi Dilillo; Patrick Girard; Aida Todri; Arnaud Virazel

doi:10.1109/ATS.2012.30

Why and How Controlling Power Consumption during Test: A Survey

Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

12 Citations (Scopus)

Abstract

Managing the power consumption of circuits and systems is challenging not only during functional operations but also during manufacturing test. In this paper, we first explain why it is important to control power consumption during test application. We will introduce the basic concepts and discuss issues arising from excessive power dissipation during test. Then, we explain how it is possible to control power consumption during test. We will provide an overview of existing structural and algorithmic solutions for power-aware testing, and we will show how low power circuits can be tested safely without affecting yield and reliability.

Original language	English
Title of host publication	2012 IEEE 21st Asian Test Symposium
Publisher	Institute of Electrical and Electronics Engineers
Pages	221-226
Number of pages	6
ISBN (Electronic)	978-0-7695-4876-0
ISBN (Print)	978-1-4673-4555-2
DOIs	https://doi.org/10.1109/ATS.2012.30
Publication status	Published - 31 Dec 2012
Externally published	Yes
Event	21st IEEE Asian Test Symposium (ATS 2012) - Nigata, Japan Duration: 19 Nov 2012 → 22 Nov 2012

Conference

Conference	21st IEEE Asian Test Symposium (ATS 2012)
Country/Territory	Japan
City	Nigata
Period	19/11/12 → 22/11/12

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title = "Why and How Controlling Power Consumption during Test: A Survey",

abstract = "Managing the power consumption of circuits and systems is challenging not only during functional operations but also during manufacturing test. In this paper, we first explain why it is important to control power consumption during test application. We will introduce the basic concepts and discuss issues arising from excessive power dissipation during test. Then, we explain how it is possible to control power consumption during test. We will provide an overview of existing structural and algorithmic solutions for power-aware testing, and we will show how low power circuits can be tested safely without affecting yield and reliability.",

author = "Alberto Bosio and Luigi Dilillo and Patrick Girard and Aida Todri and Arnaud Virazel",

year = "2012",

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booktitle = "2012 IEEE 21st Asian Test Symposium",

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note = "21st IEEE Asian Test Symposium (ATS 2012) ; Conference date: 19-11-2012 Through 22-11-2012",

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TY - GEN

T1 - Why and How Controlling Power Consumption during Test: A Survey

AU - Bosio, Alberto

AU - Dilillo, Luigi

AU - Girard, Patrick

AU - Todri, Aida

AU - Virazel, Arnaud

PY - 2012/12/31

Y1 - 2012/12/31

N2 - Managing the power consumption of circuits and systems is challenging not only during functional operations but also during manufacturing test. In this paper, we first explain why it is important to control power consumption during test application. We will introduce the basic concepts and discuss issues arising from excessive power dissipation during test. Then, we explain how it is possible to control power consumption during test. We will provide an overview of existing structural and algorithmic solutions for power-aware testing, and we will show how low power circuits can be tested safely without affecting yield and reliability.

AB - Managing the power consumption of circuits and systems is challenging not only during functional operations but also during manufacturing test. In this paper, we first explain why it is important to control power consumption during test application. We will introduce the basic concepts and discuss issues arising from excessive power dissipation during test. Then, we explain how it is possible to control power consumption during test. We will provide an overview of existing structural and algorithmic solutions for power-aware testing, and we will show how low power circuits can be tested safely without affecting yield and reliability.

U2 - 10.1109/ATS.2012.30

DO - 10.1109/ATS.2012.30

M3 - Conference contribution

SN - 978-1-4673-4555-2

SP - 221

EP - 226

BT - 2012 IEEE 21st Asian Test Symposium

PB - Institute of Electrical and Electronics Engineers

T2 - 21st IEEE Asian Test Symposium (ATS 2012)

Y2 - 19 November 2012 through 22 November 2012

ER -

Why and How Controlling Power Consumption during Test: A Survey

Abstract

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