| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 8th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS'05, Sopron, Hungary, April 13-16, 2005) |
| Pages | 244-247 |
| Publication status | Published - 2005 |
Verifying SystemC^FL designs using the SMV model checker
K.L. Man
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review