VDD ramp testing for rf circuits

J. Pineda de Gyvez, G. Gronthoud, R. Amine

    Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

    35 Citations (Scopus)
    242 Downloads (Pure)

    Abstract

    We present industrial results of a quiescent current testing technique suitable for RF testing. The operational method consists of ramping the power supply and of observing the corresponding quiescent current signatures. When the power supply is swept, all transistors are forced into various regions of operation. This has as advantage that the detection of faults is done for multiple supply voltages and corresponding quiescent currents, enhancing in this form the detectability of faults. We found that this method of structural testing yields fault coverage results comparable to functional RF tests making it a potential and attractive technique for production wafer testing due to its low cost, low testing times and low frequency requirements.
    Original languageEnglish
    Title of host publicationProceedings of the International Test Conference, 2003, ITC 2003, September 30 - October 2, 2003
    Place of PublicationNew York
    PublisherInstitute of Electrical and Electronics Engineers
    Pages651-658
    Volume1
    ISBN (Print)0-7803-8106-8
    DOIs
    Publication statusPublished - 2003

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