Abstract
An Ultra Low Power (ULP) biomedical System-on Chip (SoC) has been developed for efficient ECG/EEG signal processing in a Body Area Network environment. This experimental SoC explores the use of event-driven peripheral modules that autonomously interact with external sensors together with the use of an Application-Specific-Instruction-set Processor (ASIP) to optimize energy-efficiency during active and sleep periods. The SoC has been manufactured in standard 90nm CMOS process and use has been made of power gating to reduce leakage power that starts to become more dominant in advanced technologies. When running an ECG algorithm that is capable of reliably detecting the QRS complex in an ambulatory environment, an average power consumption of 10 x03BC;W has been measured at 0.7 V supply.
Original language | English |
---|---|
Title of host publication | Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 1 -4 |
ISBN (Electronic) | 9781424483006 |
DOIs | |
Publication status | Published - 1 Nov 2010 |
Event | 6th IEEE Asian Solid-State Circuits Conference, A-SSCC 2010 - Beijing, China Duration: 8 Nov 2010 → 10 Nov 2010 Conference number: 6 http://www.asscc.org/2010/ |
Conference
Conference | 6th IEEE Asian Solid-State Circuits Conference, A-SSCC 2010 |
---|---|
Abbreviated title | A-SSCC 2010 |
Country/Territory | China |
City | Beijing |
Period | 8/11/10 → 10/11/10 |
Internet address |