Ultra high data rate CMOS FEs

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Abstract

The availability of numerous mm-wave frequency bands for wireless communication has motived the exploration of multi-band and multi-mode integrated components and systems in the main stream CMOS technology. This opportunity has faced the RF designer with the transition between schematic and layout. Modeling the performance of circuits after layout and taking into account the parasitic effects resulting from the layout are two issues that are more important and influential at high frequency design. Performaning measurements using on-wafer probing at 60GHz has its own complexities. The very short wave-length of the signals at mm-wave frequencies makes the measurements very sensitiv to the effective length and bending of the interfaces. This paper presents different 60GHz corner blocks, e.g. Low Noise Amplifier, Zero IF mixer, Phase-Locked Loop, A Dual-Mode Mm-Wave Injection-Locked Frequency Divider and an active transformed power amplifiers implemented in CMOS technologies. These results emphasize the feasibility of the realization 60GHZ integrated components and systems in the main stream CMOS technology.
Original languageEnglish
Title of host publicationProceedings of the 20th Workshop on Advances in Analog Circuit Design (AACD 2011), 5-7 April 2011, Leuven, Belgium
Place of PublicationLeuven, Belgium
Publication statusPublished - 2011
Event20th Workshop on Advances in analog Circuit Design (AACD 2011) - Katholieke Universiteit Leuven, Leuven, Belgium
Duration: 5 Apr 20117 Apr 2011
Conference number: 20

Conference

Conference20th Workshop on Advances in analog Circuit Design (AACD 2011)
Abbreviated titleAACD 2011
CountryBelgium
CityLeuven
Period5/04/117/04/11
OtherThe 20th Workshop on Advances in Analog Circuit Design (AACD 2011)

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    Mahmoudi, R., & Roermund, van, A. H. M. (2011). Ultra high data rate CMOS FEs. In Proceedings of the 20th Workshop on Advances in Analog Circuit Design (AACD 2011), 5-7 April 2011, Leuven, Belgium Leuven, Belgium.