Short-channel zinc oxide (ZnO) thin-film transistors (TFTs) are investigated in a wide range of temperatures and bias conditions. Scaling down the channel length, the TFT performance is seriously affected by contact resistances, which depend on gate voltage and temperature. To account for the contact resistances, the transistor is ideally split in three parts. The contact regions are modeled as two separate transistors with a fixed channel length and an exponential distribution of localized states, whereas the channel is treated as reported in Part I. The overall model reproduces the measured characteristics at different channel length, with a single set of physical and geometrical parameters. It can be readily implemented in a circuit simulator. Numerical simulations confirm the validity of the model approach and are used to evaluate the impact of nonidealities at the electrode/semiconductor interface.