Towards efficient code generation for exposed datapath architectures

Kanishkan Vadivel, Roel Jordans, Sander Stuijk, Henk Corporaal, Pekka Jääskeläinen, Heikki Kultala

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

3 Citations (Scopus)
666 Downloads (Pure)

Abstract

Coarse-grained reconfigurable architectures and other exposed datapath architectures such as transport-triggered architectures come with a high energy efficiency promise for accelerating data oriented workloads. Their main drawback results from the push of complexity from the architecture to the programmer; compiler techniques that allow starting from a higher-level programming language and generate code efficiently to such architectures robustly is still an open research area. In this article we survey the known main sources of challenges and outline a generic processor architecture template that covers the most common architecture variations along with a proposal for a common code generation framework for such challenging architectures.

Original languageEnglish
Title of host publicationProceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019
EditorsSander Stuijk
Place of PublicationNew York
PublisherAssociation for Computing Machinery, Inc
Pages86-89
Number of pages4
ISBN (Electronic)978-1-4503-6762-2
DOIs
Publication statusPublished - 27 May 2019
Event22nd International Workshop on Software and Compilers for Embedded Systems, (SCOPES2019) - St. Goar, Germany
Duration: 27 May 201928 May 2019
https://scopesconf.org/scopes-19/

Conference

Conference22nd International Workshop on Software and Compilers for Embedded Systems, (SCOPES2019)
Abbreviated titleSCOPES2019
Country/TerritoryGermany
CitySt. Goar
Period27/05/1928/05/19
Internet address

Keywords

  • CGRA
  • code generation
  • energy efficiency
  • reconfigurable architectures
  • scheduling
  • TTA

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