Abstract
Analog-to-Digital converters operating at gigasamples per second are often required in nowadays communication systems. One effective way to achieve high sampling rates at low power consumption is time-interleaving. However, time-interleaved converters suffer from well known problems like offset, gain and sample time mismatch which degrade the performance of the ADC system as a whole. The designer can make use of available digital functionality to cope with these problems. This article discusses ways to improve the performance of time-interleaved analog-to-digital converters by making use of the possibilities (and tradeoffs) of added digital resources.
Original language | English |
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Title of host publication | Proceedings of the 17th ProRISC, Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006) 23 - 24 November 2006, Veldhoven, the Netherlands |
Place of Publication | Utrecht, the Netherlands |
Publisher | Technology Foundation |
Pages | 25-28 |
ISBN (Print) | 90-73461-44-8 |
Publication status | Published - 2006 |
Event | 2006 Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006) - Veldhoven, Netherlands Duration: 23 Nov 2006 → 24 Nov 2006 Conference number: 17 |
Conference
Conference | 2006 Annual Workshop on Circuits, Systems and Signal Processing (ProRISC 2006) |
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Abbreviated title | ProRISC 2006 |
Country/Territory | Netherlands |
City | Veldhoven |
Period | 23/11/06 → 24/11/06 |