Time-interleaved SAR and slope converters

P.J.A. Harpe; M. Ding; B. Büsze; C. Zhou; K.J.P. Philips; H.W.H. Groot, de

Time-interleaved SAR and slope converters

P.J.A. Harpe, M. Ding, B. Büsze, C. Zhou, K.J.P. Philips, H.W.H. Groot, de

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

5 Downloads (Pure)

Abstract

This paper investigates time-interleaved SAR and time-interleaved slope converters, targeting low-power, low-resolution, high-speed applications. Fundamentally, these two architectures can be relatively power-efficient as compared to other architectures. At the same time, complex calibration schemes are not required thanks to their inherent accuracy. The architectures are examined and compared, circuit implementations and measurement results are discussed and an outlook to the future will be given.

Original language	English
Title of host publication	Proceedings of the 21st Workshop on Advances in Analog Circuit Design, AACD 2012, 27-29 March 2012, Valkenburg, The Netherlands
Place of Publication	Berlin
Publisher	Springer
Pages	1-49
Publication status	Published - 2012
Event	21st Workshop on Advances in Analog Circuit Design, AACD 2012 - Valkenburg, Netherlands Duration: 27 Mar 2012 → 29 Mar 2012 Conference number: 21

Conference

Conference	21st Workshop on Advances in Analog Circuit Design, AACD 2012
Country/Territory	Netherlands
City	Valkenburg
Period	27/03/12 → 29/03/12
Other	AACD 2012

Cite this

@inproceedings{eb70f568900541438350ca7c07602d26,

title = "Time-interleaved SAR and slope converters",

abstract = "This paper investigates time-interleaved SAR and time-interleaved slope converters, targeting low-power, low-resolution, high-speed applications. Fundamentally, these two architectures can be relatively power-efficient as compared to other architectures. At the same time, complex calibration schemes are not required thanks to their inherent accuracy. The architectures are examined and compared, circuit implementations and measurement results are discussed and an outlook to the future will be given.",

author = "P.J.A. Harpe and M. Ding and B. B{\"u}sze and C. Zhou and K.J.P. Philips and {Groot, de}, H.W.H.",

year = "2012",

language = "English",

pages = "1--49",

booktitle = "Proceedings of the 21st Workshop on Advances in Analog Circuit Design, AACD 2012, 27-29 March 2012, Valkenburg, The Netherlands",

publisher = "Springer",

address = "Germany",

note = "21st Workshop on Advances in Analog Circuit Design, AACD 2012 ; Conference date: 27-03-2012 Through 29-03-2012",

}

Harpe, PJA, Ding, M, Büsze, B, Zhou, C, Philips, KJP & Groot, de, HWH 2012, Time-interleaved SAR and slope converters. in Proceedings of the 21st Workshop on Advances in Analog Circuit Design, AACD 2012, 27-29 March 2012, Valkenburg, The Netherlands. Springer, Berlin, pp. 1-49, 21st Workshop on Advances in Analog Circuit Design, AACD 2012, Valkenburg, Netherlands, 27/03/12.

TY - GEN

T1 - Time-interleaved SAR and slope converters

AU - Harpe, P.J.A.

AU - Ding, M.

AU - Büsze, B.

AU - Zhou, C.

AU - Philips, K.J.P.

AU - Groot, de, H.W.H.

N1 - Conference code: 21

PY - 2012

Y1 - 2012

N2 - This paper investigates time-interleaved SAR and time-interleaved slope converters, targeting low-power, low-resolution, high-speed applications. Fundamentally, these two architectures can be relatively power-efficient as compared to other architectures. At the same time, complex calibration schemes are not required thanks to their inherent accuracy. The architectures are examined and compared, circuit implementations and measurement results are discussed and an outlook to the future will be given.

AB - This paper investigates time-interleaved SAR and time-interleaved slope converters, targeting low-power, low-resolution, high-speed applications. Fundamentally, these two architectures can be relatively power-efficient as compared to other architectures. At the same time, complex calibration schemes are not required thanks to their inherent accuracy. The architectures are examined and compared, circuit implementations and measurement results are discussed and an outlook to the future will be given.

M3 - Conference contribution

SP - 1

EP - 49

BT - Proceedings of the 21st Workshop on Advances in Analog Circuit Design, AACD 2012, 27-29 March 2012, Valkenburg, The Netherlands

PB - Springer

CY - Berlin

T2 - 21st Workshop on Advances in Analog Circuit Design, AACD 2012

Y2 - 27 March 2012 through 29 March 2012

ER -

Time-interleaved SAR and slope converters

Abstract

Conference

Fingerprint

Cite this