Through-Silicon-Via resistive-open defect analysis

Carolina Metzler; Aida Todri; Alberto Bosio; Luigi Dilillo; Patrick Girard; Arnaud Virazel

doi:10.1109/ETS.2012.6233037

Through-Silicon-Via resistive-open defect analysis

Carolina Metzler, Aida Todri, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

6 Citations (Scopus)

Abstract

Three-dimensional (3D) integration is a fast emerging technology that offers integration of high density, fast performance and heterogeneous circuits in a small footprint. Through-Silicon-Vias (TSVs) enable 3D integration by providing fast performance and short interconnects among tiers. However, they are also susceptible to defects that occur during manufacturing steps and cause crucial reliability issues. In this paper, we perform an analysis of resistive-open defects (ROD) on TSVs considering coupling effects (i.e. inductive and capacitive) and a wide frequency spectrum. Our experiments show that both substrate coupling and switching frequency can have a significant impact on weak open TSV behavior.

Original language	English
Title of host publication	2012 17th IEEE European Test Symposium (ETS)
Publisher	Institute of Electrical and Electronics Engineers
Number of pages	1
ISBN (Electronic)	978-1-4673-0697-3
ISBN (Print)	978-1-4673-0697-3
DOIs	https://doi.org/10.1109/ETS.2012.6233037
Publication status	Published - 9 Jul 2012
Externally published	Yes
Event	17th IEEE European Test Symposium (ETS 2012) - Annecy, France Duration: 28 May 2012 → 31 May 2012

Conference

Conference	17th IEEE European Test Symposium (ETS 2012)
Country/Territory	France
City	Annecy
Period	28/05/12 → 31/05/12

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10.1109/ETS.2012.6233037

Cite this

@inproceedings{826731b6a17e4d7a9d5a4d48e1e037fa,

title = "Through-Silicon-Via resistive-open defect analysis",

abstract = "Three-dimensional (3D) integration is a fast emerging technology that offers integration of high density, fast performance and heterogeneous circuits in a small footprint. Through-Silicon-Vias (TSVs) enable 3D integration by providing fast performance and short interconnects among tiers. However, they are also susceptible to defects that occur during manufacturing steps and cause crucial reliability issues. In this paper, we perform an analysis of resistive-open defects (ROD) on TSVs considering coupling effects (i.e. inductive and capacitive) and a wide frequency spectrum. Our experiments show that both substrate coupling and switching frequency can have a significant impact on weak open TSV behavior.",

author = "Carolina Metzler and Aida Todri and Alberto Bosio and Luigi Dilillo and Patrick Girard and Arnaud Virazel",

year = "2012",

month = jul,

day = "9",

doi = "10.1109/ETS.2012.6233037",

language = "English",

isbn = "978-1-4673-0697-3",

booktitle = "2012 17th IEEE European Test Symposium (ETS)",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "17th IEEE European Test Symposium (ETS 2012) ; Conference date: 28-05-2012 Through 31-05-2012",

}

TY - GEN

T1 - Through-Silicon-Via resistive-open defect analysis

AU - Metzler, Carolina

AU - Todri, Aida

AU - Bosio, Alberto

AU - Dilillo, Luigi

AU - Girard, Patrick

AU - Virazel, Arnaud

PY - 2012/7/9

Y1 - 2012/7/9

N2 - Three-dimensional (3D) integration is a fast emerging technology that offers integration of high density, fast performance and heterogeneous circuits in a small footprint. Through-Silicon-Vias (TSVs) enable 3D integration by providing fast performance and short interconnects among tiers. However, they are also susceptible to defects that occur during manufacturing steps and cause crucial reliability issues. In this paper, we perform an analysis of resistive-open defects (ROD) on TSVs considering coupling effects (i.e. inductive and capacitive) and a wide frequency spectrum. Our experiments show that both substrate coupling and switching frequency can have a significant impact on weak open TSV behavior.

AB - Three-dimensional (3D) integration is a fast emerging technology that offers integration of high density, fast performance and heterogeneous circuits in a small footprint. Through-Silicon-Vias (TSVs) enable 3D integration by providing fast performance and short interconnects among tiers. However, they are also susceptible to defects that occur during manufacturing steps and cause crucial reliability issues. In this paper, we perform an analysis of resistive-open defects (ROD) on TSVs considering coupling effects (i.e. inductive and capacitive) and a wide frequency spectrum. Our experiments show that both substrate coupling and switching frequency can have a significant impact on weak open TSV behavior.

U2 - 10.1109/ETS.2012.6233037

DO - 10.1109/ETS.2012.6233037

M3 - Conference contribution

SN - 978-1-4673-0697-3

BT - 2012 17th IEEE European Test Symposium (ETS)

PB - Institute of Electrical and Electronics Engineers

T2 - 17th IEEE European Test Symposium (ETS 2012)

Y2 - 28 May 2012 through 31 May 2012

ER -

Through-Silicon-Via resistive-open defect analysis

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