The impact of scaling on hot-carrier degradation and supply voltage of deep-submicron NMOS transistors

P. Woerlee; P. Damink; M. Van Dort; C. Juffermans; C. De Kort; H. Lifka; W. Manders; G. Paulzen; H. Pomp; J. Slotboom; G. Streutker; R. Woltjer

doi:10.1109/IEDM.1991.235338

The impact of scaling on hot-carrier degradation and supply voltage of deep-submicron NMOS transistors

P. Woerlee
, P. Damink
, M. Van Dort
, C. Juffermans
, C. De Kort
, H. Lifka
, W. Manders
, G. Paulzen
, H. Pomp
, J. Slotboom
, G. Streutker
, R. Woltjer

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

6 Citations (Scopus)

Abstract

An experimental study of hot carrier degradation and power supply voltage scaling of deep-submicron NMOS devices is presented. Devices were optimized for processes with design rule between 2 μ m and 0.17 μ m. Charge pumping measurements showed that the lifetime based on interface state generation in the devices was determined only by I_sub/I_d and the drain current. It did not depend on gate length, oxide thickness, and substrate doping. The lifetime (determined by shifts in the maximum linear transconductance) of the devices with minimum gate length of different processes fall on a single life in plots of tau I_d versus I_sub/I_d. This behavior can be explained by the impact of interface damage on the transistor parameters of these devices. Light emission spectra and device simulation showed that nonlocal carrier heating becomes important for devices from deep-submicron processes. As a result the power supply voltage is almost independent of design rule for the deep-submicron process (V_dd<or=2.5 V).

Original language	English
Title of host publication	International Electron Devices Meeting 1991, IEDM 1991
Publisher	Institute of Electrical and Electronics Engineers
Pages	537-540
Number of pages	4
ISBN (Print)	0780302435
DOIs	https://doi.org/10.1109/IEDM.1991.235338
Publication status	Published - 1 Jan 1991
Externally published	Yes
Event	1991 IEEE International Electron Devices Meeting, IEDM 1991 - Washington, United States Duration: 8 Dec 1991 → 11 Dec 1991

Conference

Conference	1991 IEEE International Electron Devices Meeting, IEDM 1991
Country/Territory	United States
City	Washington
Period	8/12/91 → 11/12/91

Keywords

Charge measurement
Charge pumps
Current measurement
Degradation
Design optimization
Hot carriers
MOS devices
Power supplies
Process design
Voltage

Access to Document

10.1109/IEDM.1991.235338

Cite this

Woerlee, P., Damink, P., Van Dort, M., Juffermans, C., De Kort, C., Lifka, H., Manders, W., Paulzen, G., Pomp, H., Slotboom, J., Streutker, G., & Woltjer, R. (1991). The impact of scaling on hot-carrier degradation and supply voltage of deep-submicron NMOS transistors. In International Electron Devices Meeting 1991, IEDM 1991 (pp. 537-540). Article 235338 Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/IEDM.1991.235338

@inproceedings{0a47ce530ba947c7a4bdeb457fe62425,

title = "The impact of scaling on hot-carrier degradation and supply voltage of deep-submicron NMOS transistors",

abstract = "An experimental study of hot carrier degradation and power supply voltage scaling of deep-submicron NMOS devices is presented. Devices were optimized for processes with design rule between 2 μ m and 0.17 μ m. Charge pumping measurements showed that the lifetime based on interface state generation in the devices was determined only by Isub/Id and the drain current. It did not depend on gate length, oxide thickness, and substrate doping. The lifetime (determined by shifts in the maximum linear transconductance) of the devices with minimum gate length of different processes fall on a single life in plots of tau Id versus Isub/Id. This behavior can be explained by the impact of interface damage on the transistor parameters of these devices. Light emission spectra and device simulation showed that nonlocal carrier heating becomes important for devices from deep-submicron processes. As a result the power supply voltage is almost independent of design rule for the deep-submicron process (Vdd",

keywords = "Charge measurement, Charge pumps, Current measurement, Degradation, Design optimization, Hot carriers, MOS devices, Power supplies, Process design, Voltage",

author = "P. Woerlee and P. Damink and \{Van Dort\}, M. and C. Juffermans and \{De Kort\}, C. and H. Lifka and W. Manders and G. Paulzen and H. Pomp and J. Slotboom and G. Streutker and R. Woltjer",

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month = jan,

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doi = "10.1109/IEDM.1991.235338",

language = "English",

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pages = "537--540",

booktitle = "International Electron Devices Meeting 1991, IEDM 1991",

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note = "1991 IEEE International Electron Devices Meeting, IEDM 1991 ; Conference date: 08-12-1991 Through 11-12-1991",

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Woerlee, P, Damink, P, Van Dort, M, Juffermans, C, De Kort, C, Lifka, H, Manders, W, Paulzen, G, Pomp, H, Slotboom, J, Streutker, G & Woltjer, R 1991, The impact of scaling on hot-carrier degradation and supply voltage of deep-submicron NMOS transistors. in International Electron Devices Meeting 1991, IEDM 1991., 235338, Institute of Electrical and Electronics Engineers, pp. 537-540, 1991 IEEE International Electron Devices Meeting, IEDM 1991, Washington, Washington, United States, 8/12/91. https://doi.org/10.1109/IEDM.1991.235338

The impact of scaling on hot-carrier degradation and supply voltage of deep-submicron NMOS transistors. / Woerlee, P.; Damink, P.; Van Dort, M. et al.
International Electron Devices Meeting 1991, IEDM 1991. Institute of Electrical and Electronics Engineers, 1991. p. 537-540 235338.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - The impact of scaling on hot-carrier degradation and supply voltage of deep-submicron NMOS transistors

AU - Woerlee, P.

AU - Damink, P.

AU - Van Dort, M.

AU - Juffermans, C.

AU - De Kort, C.

AU - Lifka, H.

AU - Manders, W.

AU - Paulzen, G.

AU - Pomp, H.

AU - Slotboom, J.

AU - Streutker, G.

AU - Woltjer, R.

PY - 1991/1/1

Y1 - 1991/1/1

N2 - An experimental study of hot carrier degradation and power supply voltage scaling of deep-submicron NMOS devices is presented. Devices were optimized for processes with design rule between 2 μ m and 0.17 μ m. Charge pumping measurements showed that the lifetime based on interface state generation in the devices was determined only by Isub/Id and the drain current. It did not depend on gate length, oxide thickness, and substrate doping. The lifetime (determined by shifts in the maximum linear transconductance) of the devices with minimum gate length of different processes fall on a single life in plots of tau Id versus Isub/Id. This behavior can be explained by the impact of interface damage on the transistor parameters of these devices. Light emission spectra and device simulation showed that nonlocal carrier heating becomes important for devices from deep-submicron processes. As a result the power supply voltage is almost independent of design rule for the deep-submicron process (Vdd

AB - An experimental study of hot carrier degradation and power supply voltage scaling of deep-submicron NMOS devices is presented. Devices were optimized for processes with design rule between 2 μ m and 0.17 μ m. Charge pumping measurements showed that the lifetime based on interface state generation in the devices was determined only by Isub/Id and the drain current. It did not depend on gate length, oxide thickness, and substrate doping. The lifetime (determined by shifts in the maximum linear transconductance) of the devices with minimum gate length of different processes fall on a single life in plots of tau Id versus Isub/Id. This behavior can be explained by the impact of interface damage on the transistor parameters of these devices. Light emission spectra and device simulation showed that nonlocal carrier heating becomes important for devices from deep-submicron processes. As a result the power supply voltage is almost independent of design rule for the deep-submicron process (Vdd

KW - Charge measurement

KW - Charge pumps

KW - Current measurement

KW - Degradation

KW - Design optimization

KW - Hot carriers

KW - MOS devices

KW - Power supplies

KW - Process design

KW - Voltage

UR - https://www.scopus.com/pages/publications/84954106097

U2 - 10.1109/IEDM.1991.235338

DO - 10.1109/IEDM.1991.235338

M3 - Conference contribution

AN - SCOPUS:84954106097

SN - 0780302435

SP - 537

EP - 540

BT - International Electron Devices Meeting 1991, IEDM 1991

PB - Institute of Electrical and Electronics Engineers

T2 - 1991 IEEE International Electron Devices Meeting, IEDM 1991

Y2 - 8 December 1991 through 11 December 1991

ER -

The impact of scaling on hot-carrier degradation and supply voltage of deep-submicron NMOS transistors

Abstract

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Keywords

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