The automatic generation of a prototype of a digital processing circuit with a bit-serial architecture

S.D. Kamminga, Technische Universiteit Eindhoven (TUE). Stan Ackermans Instituut. Information and Communication Technology (ICT)

Research output: Thesis › EngD Thesis

Original language	English
Qualification	Doctor of Philosophy
Awarding Institution
Supervisors/Advisors	Stevens, M.P.J., Supervisor
Award date	1 Jan 1989
Place of Publication	Eindhoven
Publisher	Technische Universiteit Eindhoven. Stan Ackermans Instituut
Print ISBNs	90-5282-038-4
Publication status	Published - 1989

Eindverslag.

Cite this

@phdthesis{e1907b50d9254f45b72a2fd9f85a59e5,

title = "The automatic generation of a prototype of a digital processing circuit with a bit-serial architecture",

author = "S.D. Kamminga and {Technische Universiteit Eindhoven (TUE). Stan Ackermans Instituut. Information and Communication Technology (ICT)}",

note = "Eindverslag.",

year = "1989",

language = "English",

isbn = "90-5282-038-4",

publisher = "Technische Universiteit Eindhoven. Stan Ackermans Instituut",

type = "EngD Thesis",

}

TY - THES

T1 - The automatic generation of a prototype of a digital processing circuit with a bit-serial architecture

AU - Kamminga, S.D.

AU - Technische Universiteit Eindhoven (TUE). Stan Ackermans Instituut. Information and Communication Technology (ICT)

N1 - Eindverslag.

PY - 1989

Y1 - 1989

M3 - EngD Thesis

SN - 90-5282-038-4

PB - Technische Universiteit Eindhoven. Stan Ackermans Instituut

CY - Eindhoven

ER -