The goals for the Æthereal network on silicon, as it was then called, were set in 2000 and its concepts were defined early 2001. Ten years on, what has been achieved? Did we meet the goals, and what is left of the concepts? In this paper we answer those questions, and evaluate different implementations, based on a new performance: cost analysis. We discuss and reflect on our experiences, and conclude with open issues and future directions.
|Title of host publication||Proc. Design Automation Conference (DAC), 2010 47th ACM/IEEE, Anaheim, CA, 13-18 June 2010|
|Publication status||Published - 2010|