Testing embedded-core-based system chips

Y. Zorian, E.J. Marinissen, S. Dey

Research output: Contribution to journalArticleAcademicpeer-review

144 Citations (Scopus)


Recently, designers have been embedding reusable modules to build on-chip systems that form rich libraries of predesigned, preverified building blocks. These embedded cores make it easier to import technology to a new system and differentiate the corresponding product by leveraging intellectual property advantages. Most importantly, design reuse shortens the time-to-market for new systems. The attributes that make system chips built with embedded IP cores an attractive methodology-design reuse, heterogeneity, reconfigurability, and customizability-also make testing and debugging these chips a complex challenge. The authors review the various alternatives for testing embedded cores and describe solutions and proposed standards that are expected to play a key role in developing the core based design paradigm.
Original languageEnglish
Pages (from-to)52-60
Issue number6
Publication statusPublished - Jun 1999
Externally publishedYes


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