Test solution for data retention faults in low-power SRAMs

Leonardo Bonet Zordan; Alberto Bosio; Luigi Dilillo; Patrick Girard; Aida Todri; Arnaud Virazel; Nabil Badereddine

doi:10.7873/DATE.2013.099

Test solution for data retention faults in low-power SRAMs

Leonardo Bonet Zordan
, Alberto Bosio
, Luigi Dilillo
, Patrick Girard
, Aida Todri
, Arnaud Virazel
, Nabil Badereddine

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

2 Citations (Scopus)

Abstract

Low-power SRAMs embed mechanisms for reducing static power consumption. When the SRAM is not accessed during a long period, it switches into an intermediate low-power mode. In this mode, a voltage regulator is used to reduce the voltage supplied to the core-cells as low as possible without data loss. Thus, faulty-free behavior of the voltage regulator is crucial for ensuring data retention in core-cells when the SRAM is in low-power mode. This paper investigates the root cause of data retention faults due to voltage regulator malfunctions. This analysis is done under realistic conditions (i.e., industrial core-cells affected by process variations). Based on this analysis, we propose an efficient test flow for detecting data retention faults in low-power SRAMs.

Original language	English
Title of host publication	2013 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Publisher	Institute of Electrical and Electronics Engineers
Pages	442-447
Number of pages	6
ISBN (Electronic)	978-3-9815370-0-0
ISBN (Print)	978-1-4673-5071-6
DOIs	https://doi.org/10.7873/DATE.2013.099
Publication status	Published - 5 Apr 2013
Externally published	Yes
Event	16th Design, Automation and Test in Europe Conference and Exhibition (DATE 2013) - Grenoble, France Duration: 18 Mar 2013 → 22 Mar 2013 Conference number: 16 https://www.date-conference.com/date13/

Conference

Conference	16th Design, Automation and Test in Europe Conference and Exhibition (DATE 2013)
Abbreviated title	DATE 2013
Country/Territory	France
City	Grenoble
Period	18/03/13 → 22/03/13
Other
Internet address	https://www.date-conference.com/date13/

Access to Document

10.7873/DATE.2013.099

Cite this

@inproceedings{90d0be46d6ce48b49165486b81c1a94b,

title = "Test solution for data retention faults in low-power SRAMs",

abstract = "Low-power SRAMs embed mechanisms for reducing static power consumption. When the SRAM is not accessed during a long period, it switches into an intermediate low-power mode. In this mode, a voltage regulator is used to reduce the voltage supplied to the core-cells as low as possible without data loss. Thus, faulty-free behavior of the voltage regulator is crucial for ensuring data retention in core-cells when the SRAM is in low-power mode. This paper investigates the root cause of data retention faults due to voltage regulator malfunctions. This analysis is done under realistic conditions (i.e., industrial core-cells affected by process variations). Based on this analysis, we propose an efficient test flow for detecting data retention faults in low-power SRAMs.",

author = "Zordan, \{Leonardo Bonet\} and Alberto Bosio and Luigi Dilillo and Patrick Girard and Aida Todri and Arnaud Virazel and Nabil Badereddine",

year = "2013",

month = apr,

day = "5",

doi = "10.7873/DATE.2013.099",

language = "English",

isbn = "978-1-4673-5071-6",

pages = "442--447",

booktitle = "2013 Design, Automation \& Test in Europe Conference \& Exhibition (DATE)",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "16th Design, Automation and Test in Europe Conference and Exhibition (DATE 2013), DATE 2013 ; Conference date: 18-03-2013 Through 22-03-2013",

url = "https://www.date-conference.com/date13/",

}

Zordan, LB, Bosio, A, Dilillo, L, Girard, P, Todri, A, Virazel, A & Badereddine, N 2013, Test solution for data retention faults in low-power SRAMs. in 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE). Institute of Electrical and Electronics Engineers, pp. 442-447, 16th Design, Automation and Test in Europe Conference and Exhibition (DATE 2013), Grenoble, France, 18/03/13. https://doi.org/10.7873/DATE.2013.099

Test solution for data retention faults in low-power SRAMs. / Zordan, Leonardo Bonet; Bosio, Alberto; Dilillo, Luigi et al.
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE). Institute of Electrical and Electronics Engineers, 2013. p. 442-447.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Test solution for data retention faults in low-power SRAMs

AU - Zordan, Leonardo Bonet

AU - Bosio, Alberto

AU - Dilillo, Luigi

AU - Girard, Patrick

AU - Todri, Aida

AU - Virazel, Arnaud

AU - Badereddine, Nabil

N1 - Conference code: 16

PY - 2013/4/5

Y1 - 2013/4/5

N2 - Low-power SRAMs embed mechanisms for reducing static power consumption. When the SRAM is not accessed during a long period, it switches into an intermediate low-power mode. In this mode, a voltage regulator is used to reduce the voltage supplied to the core-cells as low as possible without data loss. Thus, faulty-free behavior of the voltage regulator is crucial for ensuring data retention in core-cells when the SRAM is in low-power mode. This paper investigates the root cause of data retention faults due to voltage regulator malfunctions. This analysis is done under realistic conditions (i.e., industrial core-cells affected by process variations). Based on this analysis, we propose an efficient test flow for detecting data retention faults in low-power SRAMs.

AB - Low-power SRAMs embed mechanisms for reducing static power consumption. When the SRAM is not accessed during a long period, it switches into an intermediate low-power mode. In this mode, a voltage regulator is used to reduce the voltage supplied to the core-cells as low as possible without data loss. Thus, faulty-free behavior of the voltage regulator is crucial for ensuring data retention in core-cells when the SRAM is in low-power mode. This paper investigates the root cause of data retention faults due to voltage regulator malfunctions. This analysis is done under realistic conditions (i.e., industrial core-cells affected by process variations). Based on this analysis, we propose an efficient test flow for detecting data retention faults in low-power SRAMs.

U2 - 10.7873/DATE.2013.099

DO - 10.7873/DATE.2013.099

M3 - Conference contribution

SN - 978-1-4673-5071-6

SP - 442

EP - 447

BT - 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE)

PB - Institute of Electrical and Electronics Engineers

T2 - 16th Design, Automation and Test in Europe Conference and Exhibition (DATE 2013)

Y2 - 18 March 2013 through 22 March 2013

ER -

Test solution for data retention faults in low-power SRAMs

Abstract

Conference

Access to Document

Fingerprint

Cite this