Task-level Timing Models for Guaranteed Performance in Multiprocessor Networks -on-Chip.

P. Poplavko, T. Basten, M.J.G. Bekooij, J. Meerbergen, van, B. Mesman

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

63 Citations (Scopus)
Original languageEnglish
Title of host publicationProc. International Conference on Compilers, Architectures and Synthesis for Embedded Systems.
Place of PublicationSan Jose, CA, USA
PublisherACN
Pages63-72
ISBN (Print)1-58113-676-5
Publication statusPublished - 2003
EventInternational Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2003) - San Jose, United States
Duration: 30 Oct 20031 Nov 2003

Conference

ConferenceInternational Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES 2003)
Country/TerritoryUnited States
CitySan Jose
Period30/10/031/11/03
OtherCASES 2003, San Jose, CA, USA

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