Monolithic wireless sensors with integrated antenna, on-chip transceiving, sensing and energy scavenging are low-cost and robust, thus very suitable for mass production and deployment. The design of such a sensor node requires a proper architecture with careful trade-offs and joint considerations over different building blocks. In this paper, we focus on the energy scavenging and receiver part of such a sensor node. A radio-triggered receiver architecture is proposed to achieve the extreme low energy budget. Energy/power models for different building blocks are developed that show the tradeoffs between available energy and sensor performance. A system-level analysis identifies the 60GHz mm-wave band is suitable for such applications. Moreover, a design example of receiver front-end in 65nm CMOS technology is presented to demonstrate the potential performance of the proposed architecture.
|Title of host publication||Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), 19-23 May 2013, Bejing, China|
|Place of Publication||Piscataway|
|Publisher||Institute of Electrical and Electronics Engineers|
|Publication status||Published - 2013|