Abstract
The subsampling based Software Defined Radio (SuSDR) architecture features low power consumption and reconfigurability. However, the major drawback of the SuSDR is its poor reliability and robustness due to the poor noise performance. Although jitter compensation techniques have been proposed to improve the noise performance of the SuSDR, those methods are very complicated to implement in hardware. Moreover, since the accuracy of the numerical operation is not taken into consideration in those methods, the effectiveness of those compensation methods can be questioned. In this paper, a SuSDR architecture with jitter compensation is proposed, and implementation imperfections like the accuracy of the ADC are taken into account. Using the analysis, the requirements for the ADCs and the reference frequency can be derived from the system specifications, and this will lead to a practical implementation of the proposed architecture. In conclusion, the SuSDR with the proposed jitter compensation technique can be a promising low power, reconfigurable and robust wireless architecture for wireless sensor networks (WSN).
Original language | English |
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Pages | 826-829 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 28 Sept 2012 |
Externally published | Yes |
Event | 2012 IEEE International Symposium on Circuits and Systems (ISCAS 2012) - Seoul, Korea, Republic of Duration: 20 May 2012 → 23 May 2012 |
Conference
Conference | 2012 IEEE International Symposium on Circuits and Systems (ISCAS 2012) |
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Abbreviated title | ISCAS 2012 |
Country/Territory | Korea, Republic of |
City | Seoul |
Period | 20/05/12 → 23/05/12 |