Statistical energy study for 28nm FDSOI devices

Rida Kheirallah, Jean Marc Galliere, Aida Todri-Sanial, Nadine Azemard, Gilles Ducharme

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

1 Citation (Scopus)

Abstract

Due to the effects of the Moore's law, the process variations in current technologies are increasing and have a major impact on power and performance which results in parametric yield loss. Due to this, process variability and the difficulty of modeling accurately transistor behavior impede the dimensions scaling benefits. The Fully Depleted Silicon-On-Insulator (FDSOI) technology is one of the main contenders for deep submicron devices as they can operate at low voltage with superior energy efficiency compared with bulk CMOS. In this paper, we study the static energy on 28nm FDSOI devices to implement sub-threshold circuits. Study of delay vs. static power trade-off reveals the FDSOI robustness with respect to process variations.

Original languageEnglish
Title of host publication2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2015
PublisherInstitute of Electrical and Electronics Engineers
Number of pages4
ISBN (Electronic)9781479999507
DOIs
Publication statusPublished - 6 May 2015
Externally publishedYes
Event2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2015 - Budapest, Hungary
Duration: 19 Apr 201522 Apr 2015

Conference

Conference2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2015
Country/TerritoryHungary
CityBudapest
Period19/04/1522/04/15

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