Abstract
Due to the effects of the Moore's law, the process variations in current technologies are increasing and have a major impact on power and performance which results in parametric yield loss. Due to this, process variability and the difficulty of modeling accurately transistor behavior impede the dimensions scaling benefits. The Fully Depleted Silicon-On-Insulator (FDSOI) technology is one of the main contenders for deep submicron devices as they can operate at low voltage with superior energy efficiency compared with bulk CMOS. In this paper, we study the static energy on 28nm FDSOI devices to implement sub-threshold circuits. Study of delay vs. static power trade-off reveals the FDSOI robustness with respect to process variations.
Original language | English |
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Title of host publication | 2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2015 |
Publisher | Institute of Electrical and Electronics Engineers |
Number of pages | 4 |
ISBN (Electronic) | 9781479999507 |
DOIs | |
Publication status | Published - 6 May 2015 |
Externally published | Yes |
Event | 2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2015 - Budapest, Hungary Duration: 19 Apr 2015 → 22 Apr 2015 |
Conference
Conference | 2015 16th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2015 |
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Country/Territory | Hungary |
City | Budapest |
Period | 19/04/15 → 22/04/15 |