Abstract
In this paper, a concept is proposed to solve the problems related to the embedding of AD and DA converters in system-on-chips, FPGAs or other VLSI solutions. Problems like
embedded testing, yield, reliability and reduced design space become crucial bottlenecks in the integration of high-performance mixed-signal cores in VLSI chips. On the other hand, a trend of increasing digital processing power can be observed in almost all
these systems. The presented smart approach takes full advantage of this trend in order to solve the before mentioned problems and to achieve true system integration.
Original language | English |
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Title of host publication | Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2005) 23 - 26 May 2005, Kobe, Japan |
Place of Publication | Piscataway, New Jersey, USA |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 4062-4065 |
Volume | 4 |
ISBN (Print) | 0-7803-8834-8 |
Publication status | Published - 2005 |
Event | 2005 IEEE International Symposium on Circuits and Systems (ISCAS 2005) - Kobe, Japan Duration: 23 May 2005 → 26 May 2005 |
Conference
Conference | 2005 IEEE International Symposium on Circuits and Systems (ISCAS 2005) |
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Abbreviated title | ISCAS 2005 |
Country | Japan |
City | Kobe |
Period | 23/05/05 → 26/05/05 |