Slot Synchoronization by Reducing the PPM Pulse Width in Wireless Optical Systems

R. Otte; L.P. Jong, de; A.H.M. Roermund, van

doi:10.1109/82.700942

Slot Synchoronization by Reducing the PPM Pulse Width in Wireless Optical Systems

R. Otte
, L.P. Jong, de
, A.H.M. Roermund, van

Integrated Circuits

Research output: Contribution to journal › Article › Academic › peer-review

1 Citation (Scopus)

242 Downloads (Pure)

Abstract

Digital pulse position modulation is an attractive modulation scheme in indoor wireless optical transmission systems because of its power efficiency. In this brief, slot synchronization by means of a reduced pulsewidth is discussed, the scheme is compared to on-off keying, and design rules for slot synchronizers are presented. The sensitivity deterioration of the prototype due to slot clock jitter is only 0.2 dB (optical power level)

Original language	English
Pages (from-to)	901-903
Number of pages	3
Journal	IEEE Transactions on Circuits and Systems. II, Analog and Digital Signal Processing
Volume	45
Issue number	7
DOIs	https://doi.org/10.1109/82.700942
Publication status	Published - 1998

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title = "Slot Synchoronization by Reducing the PPM Pulse Width in Wireless Optical Systems",

abstract = "Digital pulse position modulation is an attractive modulation scheme in indoor wireless optical transmission systems because of its power efficiency. In this brief, slot synchronization by means of a reduced pulsewidth is discussed, the scheme is compared to on-off keying, and design rules for slot synchronizers are presented. The sensitivity deterioration of the prototype due to slot clock jitter is only 0.2 dB (optical power level)",

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AU - Jong, de, L.P.

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AB - Digital pulse position modulation is an attractive modulation scheme in indoor wireless optical transmission systems because of its power efficiency. In this brief, slot synchronization by means of a reduced pulsewidth is discussed, the scheme is compared to on-off keying, and design rules for slot synchronizers are presented. The sensitivity deterioration of the prototype due to slot clock jitter is only 0.2 dB (optical power level)

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M3 - Article

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JO - IEEE Transactions on Circuits and Systems. II, Analog and Digital Signal Processing

JF - IEEE Transactions on Circuits and Systems. II, Analog and Digital Signal Processing

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Slot Synchoronization by Reducing the PPM Pulse Width in Wireless Optical Systems

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