Sliding-Mode Control to Compensate PVT Variations in Dual Core Systems

H.R. Pourshaghaghi; S.H. Fatemi; J. Pineda de Gyvez

Sliding-Mode Control to Compensate PVT Variations in Dual Core Systems

H.R. Pourshaghaghi
, S.H. Fatemi
, J. Pineda de Gyvez

Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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Abstract

In this paper, we present a novel robust sliding-mode controller for stabilizing supply voltage and clock frequency of dual core processors determined by dynamic voltage and frequency scaling (DVFS) methods in the presence of systematic and random variations. We show that maximum rejection for process, voltage and temperature (PVT) variations can be achieved by using the proposed sliding-mode controller. The stabilization of the presented controller is confirmed by the Lyapanov method. Experimental results demonstrate maximum 20% robustness against 20% parameter variations for a hardware of two core processors executing a JPEG decoding application.

Original language	English
Title of host publication	Proceedings of design, automation and test in Europe 2012 (DATE 2012), 12-16 march 2012, Dresend, Germany
Publication status	Published - 2012
Event	15th Design, Automation and Test in Europe Conference and Exhibition, DATE 2012 - ICC, Dresden, Germany Duration: 12 Mar 2012 → 16 Mar 2012 Conference number: 15 https://www.date-conference.com/date12/

Conference

Conference	15th Design, Automation and Test in Europe Conference and Exhibition, DATE 2012
Abbreviated title	DATE 2012
Country/Territory	Germany
City	Dresden
Period	12/03/12 → 16/03/12
Other
Internet address	https://www.date-conference.com/date12/

Cite this

@inproceedings{6126bedc1b8641f38308185d2e7f6ed0,

title = "Sliding-Mode Control to Compensate PVT Variations in Dual Core Systems",

abstract = "In this paper, we present a novel robust sliding-mode controller for stabilizing supply voltage and clock frequency of dual core processors determined by dynamic voltage and frequency scaling (DVFS) methods in the presence of systematic and random variations. We show that maximum rejection for process, voltage and temperature (PVT) variations can be achieved by using the proposed sliding-mode controller. The stabilization of the presented controller is confirmed by the Lyapanov method. Experimental results demonstrate maximum 20\% robustness against 20\% parameter variations for a hardware of two core processors executing a JPEG decoding application.",

author = "H.R. Pourshaghaghi and S.H. Fatemi and \{Pineda de Gyvez\}, J.",

year = "2012",

language = "English",

isbn = "978-1-4577-2145-8",

booktitle = "Proceedings of design, automation and test in Europe 2012 (DATE 2012), 12-16 march 2012, Dresend, Germany",

note = "15th Design, Automation and Test in Europe Conference and Exhibition, DATE 2012, DATE 2012 ; Conference date: 12-03-2012 Through 16-03-2012",

url = "https://www.date-conference.com/date12/",

}

TY - GEN

T1 - Sliding-Mode Control to Compensate PVT Variations in Dual Core Systems

AU - Pourshaghaghi, H.R.

AU - Fatemi, S.H.

AU - Pineda de Gyvez, J.

N1 - Conference code: 15

PY - 2012

Y1 - 2012

N2 - In this paper, we present a novel robust sliding-mode controller for stabilizing supply voltage and clock frequency of dual core processors determined by dynamic voltage and frequency scaling (DVFS) methods in the presence of systematic and random variations. We show that maximum rejection for process, voltage and temperature (PVT) variations can be achieved by using the proposed sliding-mode controller. The stabilization of the presented controller is confirmed by the Lyapanov method. Experimental results demonstrate maximum 20% robustness against 20% parameter variations for a hardware of two core processors executing a JPEG decoding application.

AB - In this paper, we present a novel robust sliding-mode controller for stabilizing supply voltage and clock frequency of dual core processors determined by dynamic voltage and frequency scaling (DVFS) methods in the presence of systematic and random variations. We show that maximum rejection for process, voltage and temperature (PVT) variations can be achieved by using the proposed sliding-mode controller. The stabilization of the presented controller is confirmed by the Lyapanov method. Experimental results demonstrate maximum 20% robustness against 20% parameter variations for a hardware of two core processors executing a JPEG decoding application.

M3 - Conference contribution

SN - 978-1-4577-2145-8

BT - Proceedings of design, automation and test in Europe 2012 (DATE 2012), 12-16 march 2012, Dresend, Germany

T2 - 15th Design, Automation and Test in Europe Conference and Exhibition, DATE 2012

Y2 - 12 March 2012 through 16 March 2012

ER -

Sliding-Mode Control to Compensate PVT Variations in Dual Core Systems

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Conference

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