Abstract
Memristor-based Computation-in-Memory (CIM) is one of the emerging architectures for next-generation Big Data problems. Its design requires a radically new synthesis flow because the memristor is a passive device that uses resistance to encode its logic value. This article proposes a synthesis flow for mapping parallel applications on memristor-based CIM architecture. It employs solution templates that contain scheduling, placement, and routing information to map multiple algorithms with similar data flow graphs to memristor crossbar; this template is named skeleton. Complex algorithms that do not fit any skeleton can be solved by nested skeletons. Therefore, this approach can be applied to a wide range of applications with a limited number of skeletons. It further improves the design when spatial and temporal patterns exist in input data. To accelerate simulation of generated SystemC models, we integrate MPI in skeletons. The synthesis flow and its additional features are verified with multiple applications, and the results are compared against a multicore platform. These experiments demonstrate the feasibility and the potential of this approach.
Original language | English |
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Article number | 8076720 |
Pages (from-to) | 545-558 |
Number of pages | 14 |
Journal | IEEE Transactions on Emerging Topics in Computing |
Volume | 8 |
Issue number | 2 |
Early online date | 2020 |
DOIs | |
Publication status | Published - 1 Apr 2020 |
Keywords
- Adders
- Algorithm design and analysis
- algorithmic skeleton
- Common Information Model (computing)
- Hardware
- Memristor
- Memristors
- Routing
- Skeleton
- SystemC