Silicon debug of systems-on-chips

Karel Van Doorselaer, Sridhar Narayanan, Gert Jan Van Rootselaar, Erik Jan Marinissen

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Abstract

Modern semiconductor process technologies, advanced design tools, and the reinvented reuse paradigm enable the design of very complex ICs. Some call these ICs 'system-on-chip¿, referring to the fact that their functionality could until recently only be implemented by one or several PCBs filled with ICs. While it was always difficult to locate design errors, guaranteeing that a deep sub-micron 'system-on-chip¿ is design error free is a real challenge. Floating specifications, growing geographicallyspread design teams, time-to-market pressure, and the increasing distance of IC designers to actual silicon all make it likely that 'buggy¿ hardware will become as common as 'buggy¿ software. Of course our industry does whatever is possible within given time and money budgets to prevent design errors before first silicon. Hereto techniques as simulation, emulation, and formal verification are used. However, all these techniques only deal with models of the IC, which do not take into account all effects that might occur on real silicon, and high computational costs often prevent exhaustive error coverage. In order to find design errors before the customer does, debug of actual silicon samples is inevitable. This Hot Topic session provides an overview of the state-of-the-art in physical and electrical silicon debug. The speakers address techniques currently in use, their applications and their limitations, and the research challenges for the future.

Original languageEnglish
Title of host publicationProceedings Design, Automation and Test in Europe February 23-26, 1998 Paris, France
EditorsPenny Storms, Kristine Kelly
Place of PublicationLos Alamitos
PublisherInstitute of Electrical and Electronics Engineers
Pages632-633
Number of pages2
ISBN (Print)0-8186-8361-9
DOIs
Publication statusPublished - 1 Dec 1998
Externally publishedYes
Event1st Design, Automation and Test in Europe Conference and Exhibition (DATE 1998) - Paris, France
Duration: 23 Feb 199826 Feb 1998
Conference number: 1

Conference

Conference1st Design, Automation and Test in Europe Conference and Exhibition (DATE 1998)
Abbreviated titleDATE 1998
Country/TerritoryFrance
CityParis
Period23/02/9826/02/98

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