Shared interrupt multi-core architecture for low power applications

J.D. Echeverri Escobar (Inventor), J. Pineda de Gyvez (Inventor)

Research output: PatentPatent publication

26 Downloads (Pure)

Abstract

A multicore architecture is configured to exploit explicit task parallelism to save power by sharing interrupt sources that trigger independent tasks.

Original languageEnglish
Patent numberUS2015143141
IPCG06F 13/ 24 A I
Priority date18/11/13
Publication statusPublished - 21 May 2015

Cite this