Sample-drop firmness analysis of TDMA-scheduled control applications

A. Baghbanbehrouzian, D. Goswami, M.C.W. Geilen, M. Hendriks, H. Alizadeh Ara, E.P. van Horssen, W.P.M.H. Heemels, Twan Basten

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

4 Citations (Scopus)
3 Downloads (Pure)


This paper proposes methods for verification of (m, k)-firmness properties of control applications running on a shared TDMA-scheduled processor. We particularly consider dropped samples arising from processor sharing. Based on the available processor budget for any sample that is ready for execution, the Finite-Point (FP) method is proposed for quantification of the maximum number of dropped samples. The FP method is further generalized using a timed automata based model to consider the variation in the period of samples. The UPPAAL tool is used to validate and verify the timed automata based model. The FP method gives an exact bound on the number of dropped samples, whereas the timed-automata analysis provides a conservative bound. The methods are evaluated considering a realistic case study. Scalability analysis of the methods shows acceptable verification times for different sets of parameters.
Original languageEnglish
Title of host publication2016 11th IEEE International Symposium on Industrial Embedded Systems (SIES), Krakow, Poland, 23-25 May 2016 : Proceedings
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Number of pages8
ISBN (Print)978-1-5090-2282-3
Publication statusPublished - 2016
Event11th IEEE International Symposium on Industrial Embedded Systems, SIES 2016 - Krakow, Poland
Duration: 23 May 201625 May 2016


Conference11th IEEE International Symposium on Industrial Embedded Systems, SIES 2016
Abbreviated titleSIES 2016
Internet address


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