SACA: System-level Analog CIM Accelerators Simulation Framework: Accurate Simulation of Non-Ideal Components

Fernando García-Redondo, Ali BanaGozar, Kanishkan Vadivel, Henk Corporaal, Shidhartha Das

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

2 Citations (Scopus)

Abstract

Always-ON accelerators running TinyML applications are strongly limited by the memory and computation resources available in edge devices. Compute-In-Memory (CIM) architectures based on non-volatile memories (NVM) promise to bring the required compute and memory demands of Deep Neural Networks (DNN) to the edge while consuming extremely low power. However, their system-level design is constrained by the device and periphery noise which strongly impacts and compromises the accuracy of the DNN workload. In this paper SACA, a framework for simulating host & CIM accelerator systems, is presented. The simulator quantifies the system reliability by taking into account device-level non-idealities. The accuracy of two representative TinyML workloads is analyzed based on the crossbar characteristics -NVM technology, crossbar size, periphery characteristics. To demonstrate the capabilities of SACA, extensive experiments are carried out. We have characterized a convolutional network tackling CIFAR10 image classification and a fully connected network performing Human Activity Recognition. The results lead to optimal energy/performance/accuracy profiles, while the overall analysis highlights the dramatic effects of IR-drop on larger crossbars, degrading the system's accuracy and compromising its reliability.

Original languageEnglish
Title of host publicationDCIS 2022
Subtitle of host publicationProceedings of the 37th Conference on Design of Circuits and Integrated Systems
PublisherInstitute of Electrical and Electronics Engineers
Number of pages6
ISBN (Electronic)978-1-6654-5950-1
DOIs
Publication statusPublished - 2022
Event37th Conference on Design of Circuits and Integrated Systems, DCIS 2022 - Pamplona, Spain
Duration: 16 Nov 202218 Nov 2022

Conference

Conference37th Conference on Design of Circuits and Integrated Systems, DCIS 2022
Country/TerritorySpain
CityPamplona
Period16/11/2218/11/22

Bibliographical note

Funding Information:
Research supported by EU Horizon 2020 Research and Innovation Program through MNEMOSENE project under Grant 780215.

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