RTOS acceleration in an MPSoC with reconfigurable hardware

P.G. Zaykov, G. Kuzmanov, A.M. Molnos, K.G.W. Goossens

Research output: Contribution to journalArticleAcademicpeer-review

1 Citation (Scopus)

Abstract

In this paper, we address the problem of improving the performance of real-time embedded Multiprocessor System-on-Chip (MPSoC). Such MPSoCs often execute applications composed of multiple tasks. The tasks on each processor are scheduled by a Real-Time Operating System (RTOS) instance. To improve performance, we reduce the Worst Case Execution Time (WCET) of the RTOS by new processor-coprocessor execution models using reconfigurable hardware. Furthermore, we integrate the proposed contributions on an MPSoC platform, where the processor-coprocessor execution models are applied on three reconfigurable coprocessors - Hardware Task-Status Manager (HWTSM), Thread Interrupt State Controller (TISC), and Remote Slack Manager (RSM). As a case study, we investigate the HWTSM, which determines the execution eligibility of tasks. The experimental results suggest overall system improvement up to 13.3% with the help of the HWTSM. Moreover, the TISC can boost further the performance and RSM can significantly reduce the energy consumption.

Original languageEnglish
Pages (from-to)89-105
Number of pages17
JournalComputers and Electrical Engineering
Volume53
DOIs
Publication statusPublished - 1 Jul 2016

Keywords

  • FIFO communication
  • Hardware task-status manager
  • Inter-tile remote slack information Distribution framework
  • Molen
  • Multiprocessor platform
  • Processor–coprocessor execution model
  • RTOS
  • Thread interrupt state controller

Fingerprint Dive into the research topics of 'RTOS acceleration in an MPSoC with reconfigurable hardware'. Together they form a unique fingerprint.

  • Cite this