Abstract
A node-based algebraic multi-grid finite element Laplace solver is demonstrated for the extraction of the multi-terminal DC resistance of the power distribution network at the board and package level. The solver can handle boards of arbitrary complexity, comprehending without numerical difficulties fine features associated with dense clusters of via holes and related voids in the metallization.
Original language | English |
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Title of host publication | Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 181-184 |
ISBN (Print) | 978-1-4244-2873-1 |
DOIs | |
Publication status | Published - 2008 |
Event | 17th Conference on Electrical Performance of Electronic Packaging (EPEP 2008) - San Jose, United States Duration: 27 Oct 2008 → 29 Oct 2008 Conference number: 17 |
Conference
Conference | 17th Conference on Electrical Performance of Electronic Packaging (EPEP 2008) |
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Abbreviated title | EPEP 2008 |
Country/Territory | United States |
City | San Jose |
Period | 27/10/08 → 29/10/08 |