Abstract
In this study, we focus on the development of key processes towards wafer-scale 3-dimentional/vertical (3D) integration of Indium-Phosphide (InP) photonic membranes on InP electronics via adhesive bonding. First, we identified the most critical steps and optimized them to achieve high thermal and mechanical compatibility of components for the co-integration process. Next, we developed a strategy for InP-to-InP wafer bonding with high topology tolerance, and introduced hard benzocyclobutene (BCB) anchors to preserve the alignment and BCB thickness uniformity after bonding. The resulting bond layer is homogeneous in terms of physical and mechanical properties. Finally, we developed a novel method to selectively remove the InP substrate from the photonics side via wet etching while protecting the electronics carrier wafer with hermetic multi-layer coatings. The investigation of these key steps is essential for scalable 3D integration of photonics and electronics at ultra short distances (<15 μ m ).
Original language | English |
---|---|
Pages (from-to) | 229-237 |
Number of pages | 9 |
Journal | IEEE Transactions on Semiconductor Manufacturing |
Volume | 37 |
Issue number | 3 |
DOIs | |
Publication status | Published - Aug 2024 |
Bibliographical note
Publisher Copyright:© 1988-2012 IEEE.
Keywords
- 3D integration
- adhesive bonding
- co-integration
- InP electronics
- membrane photonics