Abstract
Image-based control systems are becoming common in domains such as robotics, healthcare and industrial automation. Coping with a long sample period because of the latency of the image processing algorithm is an open challenge. Modern multi-core platforms allow to address this challenge by pipelining the sensing algorithm. Often, such systems share the resources with other tasks. We show that the performance of an image-based controller can be improved by pipelining the image processing algorithm on unallocated cores. It can be further improved by dynamically allocating (i.e. reconfiguring) cores that are temporarily not used by other tasks to the sensing pipeline. We present a state-based modelling strategy for pipelined and reconfigurable pipelined sensing. We introduce a control design strategy for reconfigurable pipelined systems that assures stability and shows improvement in the control performance.
Original language | English |
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Title of host publication | 2016 11th IEEE International Symposium on Industrial Embedded Systems (SIES), Krakow, Poland, 23-25 May 2016 : Proceedings |
Place of Publication | Piscataway |
Publisher | Institute of Electrical and Electronics Engineers |
Number of pages | 8 |
ISBN (Print) | 978-1-5090-2282-3 |
DOIs | |
Publication status | Published - 2016 |
Event | 11th IEEE International Symposium on Industrial Embedded Systems, SIES 2016 - Krakow, Poland Duration: 23 May 2016 → 25 May 2016 http://sies2016.org/ |
Conference
Conference | 11th IEEE International Symposium on Industrial Embedded Systems, SIES 2016 |
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Abbreviated title | SIES 2016 |
Country/Territory | Poland |
City | Krakow |
Period | 23/05/16 → 25/05/16 |
Internet address |