Rapid and accurate energy estimation of vector processing in VLIW ASIPs

Erkan Diken, Rosilde Corvino, Lech Jozwiak

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

2 Citations (Scopus)

Abstract

Many modern applications in important application domains, as communication, image and video processing, multimedia, etc. involve much data-level parallelism (DLP). Therefore, adequate exploitation of DLP is highly relevant. This paper focuses on effective and efficient exploitation of DLP for the synthesis of vector VLIW ASIP processors. We propose analytical energy models in order to rapidly estimate the energy consumption of a nested loop executed on a VLIW ASIP with respect to different vector widths. The models perform a rapid and relatively accurate energy consumption estimation through combining the relevant information on the application and implementation technology. The analytical energy models are experimentally validated and the validation results are discussed.

Original languageEnglish
Title of host publicationProceedings - 2013 2nd Mediterranean Conference on Embedded Computing, MECO 2013
Pages33-37
Number of pages5
DOIs
Publication statusPublished - 1 Dec 2013
Event2013 2nd Mediterranean Conference on Embedded Computing, MECO 2013 - Budva, Montenegro
Duration: 15 Jun 201320 Jun 2013

Conference

Conference2013 2nd Mediterranean Conference on Embedded Computing, MECO 2013
CountryMontenegro
CityBudva
Period15/06/1320/06/13

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