Quantization of constrained processor data paths applied to convolutional neural networks

E. de Bruin, Zoran Zivkovic, H. Corporaal

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

4 Citations (Scopus)
452 Downloads (Pure)


Artificial Neural Networks (NNs) can effectively be used to solve many classification and regression problems, and deliver state-of-the-art performance in the application domains of natural language processing (NLP) and computer vision (CV). However, the tremendous amount of data movement and excessive convolutional workload of these networks hampers large-scale mobile and embedded productization. Therefore these models are generally mapped to energy-efficient accelerators without floating-point support. Weight and data quantization is an effective way to deploy high-precision models to efficient integer-based platforms. In this paper a quantization method for platforms without wide accumulation registers is being proposed. Two constraints to maximize the bit width of weights and input data for a given accumulator size are introduced. These constraints exploit knowledge about the weight and data distribution of individual layers. Using these constraints, we propose a layer-wise quantization heuristic to find a good fixed-point network approximation. To reduce the number of configurations to consider, only solutions that fully utilize the available accumulator bits are being tested. We demonstrate that 16-bit accumulators are able to obtain a Top-1 classification accuracy within 1% of the floating-point baselines on the CIFAR-10 and ILSVRC2012 image classification benchmarks.

Original languageEnglish
Title of host publicationProceedings - 21st Euromicro Conference on Digital System Design, DSD 2018
EditorsNikos Konofaos, Martin Novotny, Amund Skavhaug
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Number of pages8
ISBN (Electronic)9781538673768
ISBN (Print)978-1-5386-7377-5
Publication statusPublished - 12 Oct 2018
Event21st Euromicro Conference on Digital System Design, DSD 2018 - Prague, Czech Republic
Duration: 29 Aug 201831 Aug 2018
Conference number: 21


Conference21st Euromicro Conference on Digital System Design, DSD 2018
Abbreviated titleDSD 2018
Country/TerritoryCzech Republic
Internet address


  • Convolutional neural networks
  • Fixed-point efficient inference
  • Narrow accumulators
  • Quantization


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