Prediction of thermo-mechanical integrity of wafer backend processes

More than 65% of IC failures are related to thermal and mechanical problems. For wafer backend processes, thermo-mechanical failure is one of the major bottlenecks. The ongoing technological trends like miniaturization, introduction of new materials, and function/product integration will increase the importance of thermomechanical reliability, as confirmed by the ITRS (International Technology Roadmap for Semiconductors [1]). since most of the thermomechnaical problems inititate in the design phase, failure prevention - designing for reliability, is strongly desired. To support wafer backend process development, it is necessary to develop reliable and efficient methodologies (both testing and modeling) to predict the thermal and mechnical behavior of backend processes. This paper presents our research results covering the backend process reliability modeling considering both thermal and mechanical (CMP) loading. The emphasis is particularly on the effect of using Cu/SiLK low-dielectric-constant (low-k) structure instead of the traditional Al/SiO2. SiLK is a particular polymeric low-k material developed by the Dow Chemical Company [2]. Our results shows that Cu/SiLK structures exhibit significantly different reliability characteristics than their aluminum predecessors, and that they are more critical from several design aspects. This not only makes the stress management in the stacks more difficult, but also strongly impacts packaging.